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P6SMB6.8AT3 Series
600 Watt Peak Power Zener Transient Voltage Suppressors
Unidirectional*
The SMB series is designed to protect voltage sensitive components from high voltage, high energy transients. They have excellent clamping capability, high surge capability, low zener impedance and fast response time. The SMB series is supplied in ON Semiconductor's exclusive, cost-effective, highly reliable SurmeticTM package and is ideally suited for use in communication systems, automotive, numerical controls, process controls, medical equipment, business machines, power supplies and many other industrial/consumer applications.
Specification Features: http://onsemi.com
* * * * * * * *
PLASTIC SURFACE MOUNT ZENER OVERVOLTAGE TRANSIENT SUPPRESSORS 5.8-171 VOLTS 600 WATT PEAK POWER
Working Peak Reverse Voltage Range - 5.8 to 171 V Standard Zener Breakdown Voltage Range - 6.8 to 200 V Peak Power - 600 Watts @ 1 ms ESD Rating of Class 3 (>16 KV) per Human Body Model Maximum Clamp Voltage @ Peak Pulse Current Low Leakage < 5 A Above 10 V UL 497B for Isolated Loop Circuit Protection Response Time is Typically < 1 ns
Cathode
Anode
Mechanical Characteristics: CASE: Void-free, transfer-molded, thermosetting plastic FINISH: All external surfaces are corrosion resistant and leads are
SMB CASE 403A PLASTIC
readily solderable
MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES: MARKING DIAGRAM
YWW xxxA Y WW xxxA = Year = Work Week = Specific Device Code = (See Table on Page 3)
260C for 10 Seconds LEADS: Modified L-Bend providing more contact area to bond pads POLARITY: Cathode indicated by polarity band MOUNTING POSITION: Any
MAXIMUM RATINGS
Please See the Table on the Following Page
ORDERING INFORMATION
*Please see P6SMB11CAT3 to P6SMB91CAT3 for Bidirectional devices. Device { P6SMBxxxAT3 Package SMB Shipping 2500/Tape & Reel
Devices listed in bold, italic are ON Semiconductor Preferred devices. Preferred devices are recommended choices for future use and best overall value.
The "T3" suffix refers to a 13 inch reel.
(c) Semiconductor Components Industries, LLC, 2001
1
May, 2001 - Rev. 5
Publication Order Number: P6SMB6.8AT3/D
P6SMB6.8AT3 Series
MAXIMUM RATINGS
Rating Peak Power Dissipation (Note 1.) @ TL = 25C, Pulse Width = 1 ms DC Power Dissipation @ TL = 75C Measured Zero Lead Length (Note 2.) Derate Above 75C Thermal Resistance from Junction to Lead DC Power Dissipation (Note 3.) @ TA = 25C Derate Above 25C Thermal Resistance from Junction to Ambient Forward Surge Current (Note 4.) @ TA = 25C Operating and Storage Temperature Range 1. 2. 3. 4. Symbol PPK PD Value 600 3.0 40 25 0.55 4.4 226 100 -65 to +150 Unit W W mW/C C/W W mW/C C/W A C
RqJL PD RqJA IFSM TJ, Tstg
10 X 1000 ms, non-repetitive 1 square copper pad, FR-4 board FR-4 board, using ON Semiconductor minimum recommended footprint, as shown in 403A case outline dimensions spec. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum.
ELECTRICAL CHARACTERISTICS
(TA = 25C unless otherwise noted, VF = 3.5 V Max. @ IF (Note 4) = 30 A) (Note 5.) Symbol IPP VC VRWM IR VBR IT QVBR IF VF Parameter Maximum Reverse Peak Pulse Current Clamping Voltage @ IPP Working Peak Reverse Voltage Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT Test Current Maximum Temperature Coefficient of VBR Forward Current Forward Voltage @ IF VC VBR VRWM IF
I
IR VF IT
V
IPP
Uni-Directional TVS
5. 1/2 sine wave or equivalent, PW = 8.3 ms, non-repetitive duty cycle
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P6SMB6.8AT3 Series
ELECTRICAL CHARACTERISTICS (Devices listed in bold, italic are ON Semiconductor Preferred devices.)
VRWM (Note 6.) Volts Breakdown Voltage IR @ VRWM A VBR Volts (Note 7.) Min Nom Max @ IT mA VC @ IPP (Note 8.) VC Volts IPP Amps QVBR %/C
Device
Device Marking
P6SMB6.8AT3 P6SMB7.5AT3 P6SMB8.2AT3 P6SMB9.1AT3 P6SMB10AT3 P6SMB11AT3 P6SMB12AT3 P6SMB13AT3 P6SMB15AT3 P6SMB16AT3 P6SMB18AT3 P6SMB20AT3 P6SMB22AT3 P6SMB24AT3 P6SMB27AT3 P6SMB30AT3
P6SMB33AT3 P6SMB36AT3 P6SMB39AT3 P6SMB43AT3 P6SMB47AT3 P6SMB51AT3 P6SMB56AT3 P6SMB62AT3 P6SMB68AT3 P6SMB75AT3 P6SMB82AT3 P6SMB91AT3 P6SMB100AT3 P6SMB110AT3 P6SMB120AT3 P6SMB130AT3 P6SMB150AT3 P6SMB160AT3 P6SMB170AT3 P6SMB180AT3 P6SMB200AT3
6V8A 7V5A 8V2A 9V1A 10A 11A 12A 13A
15A 16A 18A 20A
5.8 6.4 7.02 7.78 8.55 9.4 10.2 11.1
12.8 13.6 15.3 17.1
1000 500 200 50 10 5 5 5
5 5 5 5
6.45 7.13 7.79 8.65 9.5 10.5 11.4 12.4
14.3 15.2 17.1 19
6.8 7.51 8.2 9.1 10 11.05 12 13.05
15.05 16 18 20
7.14 7.88 8.61 9.55 10.5 11.6 12.6 13.7
15.8 16.8 18.9 21
10 10 10 1 1 1 1 1
1 1 1 1
10.5 11.3 12.1 13.4 14.5 15.6 16.7 18.2
21.2 22.5 25.2 27.7
57 53 50 45 41 38 36 33
28 27 24 22
0.057 0.061 0.065 0.068 0.073 0.075 0.078 0.081
0.084 0.086 0.088 0.09
22A 24A 27A 30A
33A 36A 39A 43A 47A 51A 56A 62A 68A 75A 82A 91A 100A 110A 120A 130A 150A 160A 170A 180A 200A
18.8 20.5 23.1 25.6
28.2 30.8 33.3 36.8 40.2 43.6 47.8 53 58.1 64.1 70.1 77.8 85.5 94 102 111 128 136 145 154 171
5 5 5 5
5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5
20.9 22.8 25.7 28.5
31.4 34.2 37.1 40.9 44.7 48.5 53.2 58.9 64.6 71.3 77.9 86.5 95 105 114 124 143 152 162 171 190
22 24 27.05 30
33.05 36 39.05 43.05 47.05 51.05 56 62 68 75.05 82 91 100 110.5 120 130.5 150.5 160 170 180 200
23.1 25.2 28.4 31.5
34.7 37.8 41 45.2 49.4 53.6 58.8 65.1 71.4 78.8 86.1 95.5 105 116 126 137 158 168 179 189 210
1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
30.6 33.2 37.5 41.4
45.7 49.9 53.9 59.3 64.8 70.1 77 85 92 103 113 125 137 152 165 179 207 219 234 246 274
20 18 16 14.4
13.2 12 11.2 10.1 9.3 8.6 7.8 7.1 6.5 5.8 5.3 4.8 4.4 4.0 3.6 3.3 2.9 2.7 2.6 2.4 2.2
0.092 0.094 0.096 0.097
0.098 0.099 0.1 0.101 0.101 0.102 0.103 0.104 0.104 0.105 0.105 0.106 0.106 0.107 0.107 0.107 0.108 0.108 0.108 0.108 0.108
6. A transient suppressor is normally selected according to the working peak reverse voltage (VRWM), which should be equal to or greater than the DC or continuous peak operating voltage level. 7. VBR measured at pulse test current IT at an ambient temperature of 25C. 8. Surge current waveform per Figure 2 and derate per Figure 3.
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P6SMB6.8AT3 Series
100 NONREPETITIVE PULSE WAVEFORM SHOWN IN FIGURE 2 10 tr 10 s 100 VALUE (%) PEAK VALUE - IPP IPP 2 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAYS TO 50% OF IPP.
PP, PEAK POWER (kW)
HALF VALUE 50 tP
1
0.1
0.1 s
1 s
10 s
100 s
1 ms
10 ms
0
0
1
2 t, TIME (ms)
3
4
tP, PULSE WIDTH
Figure 1. Pulse Rating Curve
160 PEAK PULSE DERATING IN % OF PEAK POWER OR CURRENT @ T = 25 C A 140 120 100 80 60 40 20 0 0 25 50 75 100 125 150 Vin
Figure 2. Pulse Waveform
TYPICAL PROTECTION CIRCUIT
Zin
LOAD
VL
TA, AMBIENT TEMPERATURE (C)
Figure 3. Pulse Derating Curve
C, CAPACITANCE (pF)
10,000 MEASURED @ ZERO BIAS 1000 MEASURED @ VRWM 100
10 0.1 1 10 100 VBR, BREAKDOWN VOLTAGE (VOLTS) 1000
Figure 4. Capacitance versus Breakdown Voltage
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P6SMB6.8AT3 Series
APPLICATION NOTES
RESPONSE TIME
In most applications, the transient suppressor device is placed in parallel with the equipment or component to be protected. In this situation, there is a time delay associated with the capacitance of the device and an overshoot condition associated with the inductance of the device and the inductance of the connection method. The capacitive effect is of minor importance in the parallel protection scheme because it only produces a time delay in the transition from the operating voltage to the clamp voltage as shown in Figure 5. The inductive effects in the device are due to actual turn-on time (time required for the device to go from zero current to full current) and lead inductance. This inductive effect produces an overshoot in the voltage across the equipment or component being protected as shown in Figure 6. Minimizing this overshoot is very important in the application, since the main purpose for adding a transient suppressor is to clamp voltage spikes. The SMB series have a very good response time, typically < 1 ns and negligible inductance. However, external inductive effects could produce unacceptable overshoot. Proper circuit layout,
minimum lead lengths and placing the suppressor device as close as possible to the equipment or components to be protected will minimize this overshoot. Some input impedance represented by Zin is essential to prevent overstress of the protection device. This impedance should be as high as possible, without restricting the circuit operation.
DUTY CYCLE DERATING
The data of Figure 1 applies for non-repetitive conditions and at a lead temperature of 25C. If the duty cycle increases, the peak power must be reduced as indicated by the curves of Figure 7. Average power must be derated as the lead or ambient temperature rises above 25C. The average power derating curve normally given on data sheets may be normalized and used for this purpose. At first glance the derating curves of Figure 7 appear to be in error as the 10 ms pulse has a higher derating factor than the 10 s pulse. However, when the derating factor for a given pulse of Figure 7 is multiplied by the peak power value of Figure 1 for the same pulse, the results follow the expected trend.
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P6SMB6.8AT3 Series
OVERSHOOT DUE TO INDUCTIVE EFFECTS Vin (TRANSIENT) VL VL
V
Vin (TRANSIENT)
V
Vin td tD = TIME DELAY DUE TO CAPACITIVE EFFECT t
t
Figure 5.
Figure 6.
1 0.7 0.5 DERATING FACTOR 0.3 0.2 0.1 0.07 0.05 0.03 0.02 10 s 0.01 0.1 0.2 0.5 1 2 5 10 D, DUTY CYCLE (%) 20 50 100 100 s PULSE WIDTH 10 ms
1 ms
Figure 7. Typical Derating Factor for Duty Cycle
UL RECOGNITION The entire series has Underwriters Laboratory Recognition for the classification of protectors (QVGV2) under the UL standard for safety 497B and File #116110. Many competitors only have one or two devices recognized or have recognition in a non-protective category. Some competitors have no recognition at all. With the UL497B recognition, our parts successfully passed several tests including Strike Voltage Breakdown test, Endurance Conditioning, Temperature test, Dielectric Voltage-Withstand test, Discharge test and several more. Whereas, some competitors have only passed a flammability test for the package material, we have been recognized for much more to be included in their Protector category.
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P6SMB6.8AT3 Series
OUTLINE DIMENSIONS
Transient Voltage Suppressors - Surface Mounted
600 Watt Peak Power
SMB DO-214AA CASE 403A-03 ISSUE D
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. D DIMENSION SHALL BE MEASURED WITHIN DIMENSION P.
S A
D
B
C
INCHES DIM MIN MAX A 0.160 0.180 B 0.130 0.150 C 0.075 0.095 D 0.077 0.083 H 0.0020 0.0060 J 0.006 0.012 K 0.030 0.050 P 0.020 REF S 0.205 0.220
MILLIMETERS MIN MAX 4.06 4.57 3.30 3.81 1.90 2.41 1.96 2.11 0.051 0.152 0.15 0.30 0.76 1.27 0.51 REF 5.21 5.59
K
P
J
H
0.089 2.261
0.108 2.743
inches mm
0.085 2.159
SMB Footprint
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P6SMB6.8AT3 Series
Surmetic is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303-675-2167 or 800-344-3810 Toll Free USA/Canada N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (Mon-Fri 2:30pm to 7:00pm CET) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (Mon-Fri 2:00pm to 7:00pm CET) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (Mon-Fri 12:00pm to 5:00pm GMT) Email: ONlit@hibbertco.com EUROPEAN TOLL-FREE ACCESS*: 00-800-4422-3781 *Available from Germany, France, Italy, UK, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: 303-308-7143 (Mon-Fri 8:00am to 5:00pm MST) Email: ONlit-spanish@hibbertco.com Toll-Free from Mexico: Dial 01-800-288-2872 for Access - then Dial 866-297-9322 ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 1-303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001-800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative.
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P6SMB6.8AT3/D

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